The Power and Bandwidth Advantage of an H.264 IP Core with 8-16:1 Compressed Reference Frame Store

Building a new class of H.264 devices without external DRAM Power is an increasingly important consideration for the majority of system designers. This is particularly true in the case of small handheld consumer devices such as cameras, camcorders and mobile phones. In such devices, video compression technology is used that relies on power hungry DRAMs to store the reference frames during the encoding and decoding process. Figure 1 shows the dataflow for a typical video encoder algorithm. Without loss of generality, the discussion is applicable to many other video compression algorithms as they are based on very similar concepts. The letters T and Q represent respectively, the transform and the quantization stages. Regardless of the particular video compression algorithm, after it has been encoded, a reference frame is reconstructed and stored, generally given its size, in external memory.